The register set

The processor has 16 16-bit registers, although only 12 of them are truly general purpose. The first four have dedicated uses:

r2 and r3 have no use as pointers. When specified in the context of a pointer they provide an alternate function - common constant values. This is one of the important features of the MSP430 instruction set, allowing it to achieve a high level of code density, and a flexible instruction set. These constant registers can provide the numbers -1, 1, 2, 4 or 8. So, for example, the "clr x" is actually emulated by the instruction "mov #0,x". The constant "0" is taken from the constant register r3. The assembler understands both "clr x" and "mov #0,x", and produces the same code for either. Many RISC and RISC like architectures suffer poor code density. The constant registers allow the MSP430 to achieve a very competitive code density. They also make the code faster, as less program memory read cycles are needed. See below for the actual encoding used to select a particular constant.

Note that some assemblers for the MSP430 allow the use of the alternate names "PC" for "r0", "SP" for "r1", and "SR" for "r2". GNU msp430 binutils does not understand these alternate names. You must use "r0", "r1" or "r2".