The available addressing modes

MSP430 instructions have at most two operands, a source and a destination.

All instructions are 16 bits long, followed by at most two optional offsets words, one for each of the source and the destination.

The source operand (or the only operand of one-operand instructions) is specified with 2 addressing mode bits and 4 register select bits:

00 nnnnRnRegister direct
01 nnnnoffset(Rn)Register indexed
10 nnnn@RnRegister indirect
11 nnnn@Rn+Register indirect with post-increment

The only addressing mode that uses an extension word is the indexed mode. A 16-bit offset can reach anywhere in the address space.

The destination operand in a two-operand instruction has only one addressing mode bit, which selects either register direct or indexed. Register indirect can obviously be faked up with a zero index.

Operand addresses are computed in a simple, sequential way. The C statement

*p++ *= 2;
can be implemented as
add @Rn+,-2(Rn)
because the source operand is computed completely (including the register post-increment) before the destination is computed.

When r0 (the program counter) is used as a base address, indexed mode provides PC-relative addressing. This is, in fact, the usual way that TI's MSP430 assembler accesses operands when a label is referred to.

@r0 just specifies the following instruction word in ROM, but @r0+ specifies that word and skips over it. In other word, an immediate constant! You can just write #1234 and the assembler will specify the addressing mode properly.

r1, the stack pointer, can be used with any addressing mode, but @r1+ always increments by 2 bytes, even on a byte access.

When r2 (the status register) or r3 (the zero register) are specified, the addressing mode bits are decoded specially:

00 0010r2Normal access
01 0010&<location>Absolute addressing. The extension word is used as the address directly. The leading & is TI's way of indicating that the usual PC-relative addressing should not be used.
10 0010#4This encoding specifies the immediate constant 4.
11 0010#8This encoding specifies the immediate constant 8.
00 0011#0This encoding specifies the immediate constant 0.
01 0011#1This encoding specifies the immediate constant 1.
10 0011#2This encoding specifies the immediate constant 2.
11 0011#-1This specifies the all-bits-set constant, -1.