Instruction timing

Generally, instructions take 1 cycle per word of memory accessed.

Thus, start with 1 cycle for the instruction itself. Then add 1 cycle for a memory source, 2 cycles for a memory destination, and one additional cycle per offset word.

Note that in two-operand instructions, memory destinations require an offset word, so they cost a total of 3 cycles.

This holds even for instructions (MOV, CMP and BIT) that only access the destination once.

Short immediate constants (using r2 or r3) count as register operands for instruction timing purposes.

Exceptions to this rule are:

• A 2-operand instruction which writes to PC (r0) takes an extra cycle if it's only one word long (i.e. source not indexed).

• Jumps take 2 cycles, whether taken or not.

• PUSH, CALL and RETI are special:

  PUSH Rn	3 cycles
  PUSH @Rn, @Rn+, #x	4 cycles
  PUSH offset(Rn)	5 cycles
  CALL Rn	4 cycles
  CALL @Rn	4 cycles
  CALL @Rn+, #x	5 cycles
  CALL offset(Rn)	5 cycles
  RETI	5 cycles

Other CPU operations take following times to execute: