Interrupts

The MSP430 supports 16 exception vectors, from 0xFFE0 to 0xFFFF. There are 14 maskable interrupts which are assigned to peripherals in a model-dependent way. The first 14 can be masked by clearing the GIE bit in the status register. The last two are non-maskable: 0xFFFC is the NMI vector, and 0xFFFE is the reset vector.

Actually, all of the "non-maskable" interrupt sources are maskable, just not with the GIE bit. They are:

Handling an interrupt (other than RESET) consists of:

A reset is similar, but doesn't save any state.

You can nest interrupt handlers by disabling the current source and setting the GIE bit back to 1.

Note that there are no exceptions internal to the processor such as divide by zero or address error. You can cause exceptions or reset by writing to peripherals.