mspgcc: A port of the GNU tools to the Texas Instruments MSP430 microcontrollers | ||
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Several routines are available to assist in handling the status register. These should be used with care. Altering the status register bits in an uncontrolled way could badly affect the operation of your program.
Set the value of the status register (r2). Read the value of the status register (r2). Set bits in the status register (r2), using the "bis" instruction. Clear bits in the status register (r2), using the "bic" instruction. Perform an operation on an SFR, which is neither optimized nor modified by the compiler. For example:SFR_CMD(bis.b, IE1,WDTIE); /* Enable the watchdog interrupt. */ |
IE1 |= WDTIE; |
Set bits in the copy of the status register stored on the statck.
Clear bits in the copy of the status register stored on the statck.
These functions should only be used within interrupt service routines. At present GCC issues a warning when these functions are used, but the correct code is produced. To make these functions (and the BIS_SR and BIC_SR) easier to use for switching LPM modes, the following values are defined when "io.h" is included in your source code
"LPM0_bits" - the combination of status register bit which selects LPM 0.
"LPM1_bits" - the combination of status register bit which selects LPM 1.
"LPM2_bits" - the combination of status register bit which selects LPM 2.
"LPM3_bits" - the combination of status register bit which selects LPM 3.
"LPM4_bits" - the combination of status register bit which selects LPM 4.
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